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System Verilog Operators & expressions
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System Verilog Operators :
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Operator Type
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Operator Symbol
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Operation Performed
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| Arithmetic |
* |
Multiply |
| / |
Division |
| + |
Add |
| - |
Subtract |
| % |
Modulus |
| + |
Unary plus |
| - |
Unary minus |
| Logical |
! |
Logical negation |
| && |
Logical and |
| || |
Logical or |
| Relational |
> |
Greater than |
| < |
Less than |
| >= |
Greater than or equal |
| <= |
Less than or equal |
| Equality |
== |
Equality |
| != |
inequality |
| Reduction |
~ |
Bitwise negation |
| ~& |
nand |
| | |
or |
| ~| |
nor |
| ^ |
xor |
| ^~ |
xnor |
| ~^ |
xnor |
| Shift |
>> |
Right shift |
| << |
Left shift |
| Concatenation |
{ } |
Concatenation |
| Conditional |
? |
conditional |
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