Top Level for OVM based testbench :

`ifndef __MEM_TB_TOP__
`define __MEM_TB_TOP__


`include "dummy_dut.v"

module mem_tb_top;
    `include "mem_def.svh"
    `include "mem_if.sv"

    mem_if m_if ();
    mem_transfer t1;

    // Connect to DUT here
    dummy_dut dut ( 
        m_if.WX,
        m_if.EX,
        m_if.CLK,
        m_if.WRENX,
        m_if.A,
        m_if.D,
        m_if.Q
    );

    initial 
    begin
        $set_coverage_db_name("mem_coverage.ucdb");
        run_test ();
    end 

    // generate clock 
    initial begin
        m_if.CLK = 1; 
    end

    always 
        #5 m_if.CLK = ~m_if.CLK;

    initial 
    begin
        $display ("Starting out testbench \n");
    end 

endmodule : mem_tb_top



`endif // __MEM_TB_TOP__

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