OVM Sequence Example for Memory DUT :

`ifndef __MEM_MASTER_SEQUENCER__
`define __MEM_MASTER_SEQUENCER__

`include "ovm.svh"

class mem_master_sequencer extends ovm_sequencer # (mem_transfer);
    
    protected virtual mem_if m_if;

    protected int master_id;

    `ovm_object_utils_begin (mem_master_sequencer)
        `ovm_field_int (master_id, OVM_ALL_ON)
    `ovm_object_utils_end

    `ovm_declare_sequence_lib

    // constructor 
    function new (string name = "mem_master_sequencer", ovm_component parent = null) ;
        super.new (name, parent);
        `ovm_update_sequence_lib_and_item(mem_transfer)
    endfunction : new 

    function void assign_vi (virtual interface mem_if m_if);
        this.m_if = m_if;
    endfunction : assign_vi

endclass : mem_master_sequencer


`endif // __MEM_MASTER_SEQUENCER__

This Articles is written/submitted by puneet (Puneet Aggarwal). You can also contribute to Asicguru.com. Click here to start